1. Field of the Invention
This invention relates generally to data encoding, and more particularly to video data encoding algorithms providing compatibility with a class of digital visual interface (DVI) receivers.
2. Description of the Prior Art
The Digital Visual Interface Specification, Revision 1.0 (DVI 1.0), published by the Digital Display Working Group (DDWG) describes an encoding scheme that should be used for transmission of video data across an interconnecting cable in a compliant system. The DVI 1.0 encoding algorithm involves the expansion of 8-bit video data to a 10-bit serial word. During active video times, the video data is encoding, and during inactive video times, two binary signals are encoded. On one channel, for example, these two binary signals are used to represent horizontal and vertical synchronizing signals. For active video, the input word is denoted as D0 through D7 (D0 is the LSB). The serial word is denoted S0 through S9 (where S0 is the LSB and the first bit to be sent). The algorithm is defined as:
S0=D0{circumflex over ( )}DC
S1=D1{circumflex over ( )}S0{circumflex over ( )}TC{circumflex over ( )}DC
S2=D2{circumflex over ( )}S1{circumflex over ( )}TC{circumflex over ( )}DC
S3=D3{circumflex over ( )}S2{circumflex over ( )}TC{circumflex over ( )}DC
S4=D4{circumflex over ( )}S3{circumflex over ( )}TC{circumflex over ( )}DC
S5=D5{circumflex over ( )}S4{circumflex over ( )}TC{circumflex over ( )}DC
S6=D6{circumflex over ( )}S5{circumflex over ( )}TC{circumflex over ( )}DC
S7=D7{circumflex over ( )}S6{circumflex over ( )}TC{circumflex over ( )}DC
S8=TC{circumflex over ( )}1
S9=DC
where xe2x80x98{circumflex over ( )}xe2x80x99 is defined as an exclusive-OR operation, TC is a xe2x80x98Transition Controlxe2x80x99 bit, and DC is a xe2x80x98DC Balance Controlxe2x80x99 bit, as described in further detail herein below.
In order to be able to identify active video data from non-active video data, the inventors of the prior art algorithm set forth above identified the number of transitions within the 10-bit word as a key characteristic that could be detected. Furthermore, certain characters could be sent to uniquely identify the LSB/MSB positions within the serial data stream. In order to prevent the active video characters from being misinterpreted, the TC bit is used to reduce the number of transitions within an active data symbol.
Assume DC=0 (DC has a separate, independent function described herein below), with TC=0, a binary data symbol (LSB)11111111(MSB) would be first encoded as (LSB)1010101010(MSB). Since the goal of the algorithm is to minimize the number of transitions for active data, the TC bit must be set (i.e. perform transition control), and hence the character would be fully encoded as (LSB)1111111100(MSB).
Further, if one assumes that the preceding bit in the serial stream has a logic value of xe2x80x981xe2x80x99, it can be shown that all 8-bit input data can be encoded into a 10-bit code with fewer than six 0-to-1 or 1-to-0 transitions.
The DC Balance Control bit is used to optionally invert bits S0 through S7 in order to maintain a DC bias close to zero. The goal of the encoder is to transmit exactly the same number of ones and zeros over a period of time. The encoder keeps a running count of the number of ones and zeros that it has transmitted within the current active video period. If there is a disparity between the number of ones and the number of zeros that have been sent, the encoder will adjust the DC Balance Control bit to ensure that the current character, at worst, does not add to this disparity, and typically will cause the disparity to bias itself towards zero.
If the first active data symbol is (LSB)10000000(MSB), the encoder will transmit the serial code (LSB)1111111110(MSB). This will accumulate a disparity of +8 (i.e. nine xe2x80x981xe2x80x99s and one xe2x80x980xe2x80x99 have been sent). If the second active data symbol is (LSB)01000000(MSB), the transmitter can send either (LSB)0111111110(MSB) or (LSB)1000000011(MSB). These two characters have individual disparities of +6 and xe2x88x924 respectively. Since it is desirable to maintain a cumulative disparity close to zero, the second character must be sent; hence the cumulative disparity will become +4([+8]+[xe2x88x924]).
For the purpose of DVI 1.0, there are four synchronization characters that represent inactive video data. The particular value that should be sent depends on the state of the two additional binary signals that are transmitted during inactive video:
(C1,C0)=(0,0): (LSB)0010101011(MSB)
(C1,C0)=(0,1): (LSB)1101010100(MSB)
(C1,C0)=(1,0): (LSB)0010101010(MSB)
(C1,C0)=(1,1): (LSB)1101010101(MSB)
In view of the foregoing, an encoding scheme that simplifies the TMDS encoding algorithm described in the DVI 1.0 specification while retaining compatibility with most existing DVI receivers would provide great advantages over the prior art.
The present invention is directed to an encoding scheme that simplifies the TMDS encoding algorithm described in the DVI 1.0 specification while retaining compatibility with most existing DVI receivers. The encoding scheme can be described as:
S0=D0{circumflex over ( )}INV
S1=D1{circumflex over ( )}S0{circumflex over ( )}INV
S2=D2{circumflex over ( )}S1{circumflex over ( )}INV
S3=D3{circumflex over ( )}S2{circumflex over ( )}INV
S4=D4{circumflex over ( )}S3{circumflex over ( )}INV
S5=D5{circumflex over ( )}S4{circumflex over ( )}INV
S6=D6{circumflex over ( )}S5{circumflex over ( )}INV
S7=D7{circumflex over ( )}S6{circumflex over ( )}INV
S8=1
S9=INV
In one aspect of the invention, a digital visual interface encoding scheme is implemented without a Transition Control bit such that the number of transitions is not controlled and such that the active and non-active video cannot be separated based on the number of transitions while retaining compatibility with most existing DVI receivers.
In still another aspect of the invention, a digital visual interface encoding scheme is implemented such that a DC balance is not maintained on the associated cable while retaining compatibility with most existing DVI receivers.
In yet another aspect of the invention, a digital visual interface encoding scheme is implemented having the INV bit set to a xe2x80x981xe2x80x99 for the purpose of removing xe2x80x98roguexe2x80x99 character sequences while retaining compatibility with most existing DVI receivers.